Dynamically Reconfigurable Instruction Cache for Low-Power ARM Custom Cores
🔁Cache Coherence
Flag this post
V8: Digging into the TurboFan JIT (2015)
🚀Performance
Flag this post
Availability — Queue Based Load Leveling
⭕Ring Buffers
Flag this post
Attention really is all you need — The Encoder
pub.towardsai.net·1h
🤖Transformers
Flag this post
The skills and physics of high-performance driving, Pt. 1
lesswrong.com·5h
🧮Algebraic Effects
Flag this post
I tested GPT-5.1 Codex against Sonnet 4.5, and it's about time Anthropic bros take pricing seriously.
📦Folly
Flag this post
I'm building a language that compiles Haskell-style Monads and RAII down to high-performance C. I call it Cicili
λFunctional Programming
Flag this post
Asynchronous Wait-Free Runtime Verification and Enforcement of Linearizability
arxiv.org·2d
✓Formal Verification
Flag this post
Model recommendations for 128GB Strix Halo and other big unified RAM machines?
🔐Hardware Security
Flag this post
EP189: How to Design Good APIs
blog.bytebytego.com·14h
🎨API Design
Flag this post
Zig GUI from Scratch
🕸️WASM
Flag this post
ML Systems Textbook by Havard
🚀MLOps
Flag this post
AMD continues to chip away at Intel's X86 market share — company now sells over 25% of all x86 chips and powers 33% of all desktop systems
📊Intel PMU
Flag this post
Loading...Loading more...